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T1024 RCW and DDR Validation Doubts

Question asked by abhishek borana on Feb 19, 2019
Latest reply on Feb 21, 2019 by abhishek borana

Dear all,

I have designed a custom board based on T1024RDB. I have few doubts:

 

Doubt-1: In T1024RDB, When select switch settings to load RCW from SPI flash (nand flash and nor flash is blank), i notice that RCW in register DCFG_CCR_RCWSR1 is different  from the data in binary file. Why it is different, it should be same as that in binary file or in .txt file which override RCW

 

Doubt-2:  Doubt-2: In T1024RDB, If i write NAND flash with u-boot image (spi and nor flash blank), u-boot do not run at all. I configured switch settings accordingly. What can be the reason ?

 

Doubt-3: Can i load RCW and run u-boot  from nand flash  (without using nor and spi flash) ? The NAND flash used in T1024RDB is MT29F8G08ABBCAH4    . This flash is 8-bit,  4096 blocks (2 planes), 64 page/block, page size 4KB. But this option is absent in QCVS field IFC_Mode and also in reference manual of T1024, Page-190. Which option should i select. Nearest option provided is 8-bit NAND Flash, 4 KB page, 128 pages/block   (64page.block is absent).

 

Doubt-4:  In T1024RDB, i configured switch settings for SPI flash (when nand flash and nor flash is blank) , some RCW is being loaded. I checked RCW from registered through CodeWarrior in Connect Mode.  Now if i run ddr validation tool from QCVS project, it fails. Why it is failing ?  

 

Doubt-5:  Should DDR Validation work if i write only  64 byte RCW with preamble (8 bytes) and CRC , PBL.bin file generated by QCVS tool without any PBI command and not boot code?  Should i put both cores in hold-off state or core-0 in non-holdoff state ?  

 

I hope to get answers to solve my issues.  Thank you all in advance.

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