AnsweredAssumed Answered

LPC824 I2C Master Lockup

Question asked by Daniel Brown on Feb 14, 2019
Latest reply on Feb 18, 2019 by Kerry Zhou

Hello,

 

I having a similar issue to the threads below but I am not not sure that the posted responses fit my case. I have an I2C0 master only (no slave enabled on this port), configured at 100 kHz. I am using LPCXpresso and the LPCOpen package for the LPC824 eval board, using the board and chip project within the LPCOpen packcage. I have been using the I2C0 peripheral successfully for 6 months communicating to the only slave on the bus a PAC1710 voltage and current monitor. The LPC MCU and the PAC1710 slave chip are both on the same PCB with pull-ups of around 2kohm. Very short wiring less than 0.5cm. I have been compiling my project in debug mode until now. The problem is that when I compile in release mode (redlib no host libraries) or when I put back to back I2C transaction too close together in time (< 1uS) I get a lockup in the master xfer code, the STAT register never goes back to pending after a MST_START. I never get out of the initial while loop. I will take some scopeshots and post them. But does anybody have any initial thoughts on this?

 

I have heard very similar problems on this forum but none of the answers were quite right. For example, in my case, power supply is stable long before transactions begin. 

 

Re: I²C malfunction/freezing? | NXP Community 

I&sup2;C malfunction/freezing of lpc824 I&a... | NXP Community 

Outcomes