FLEXCAN1 Pins assignment indication for IMXRT105/6x on the reference manual.

[GottiLuca]

On the reference manual of the IMXRT105/6x microcontrollers ( i'm referreìing to 1052 , 1060 and 1064 in particular ) there is a erratic indication of the pinout for the FLEXCAN1 interface .

For example , referring to the i.MX RT1064 Processor Reference Manual ( Rev. 0.1 ) at page 280 the FLEXCAN1_TX is indicated that can be muxed on pin GPIO_AD_B1_08 ( or GPIO_B0_02, or GPIO_EMC_17, or GPIO_SD_B1_02 ) and FLEXCAN1_RX is muxed on GPIO_AD_B1_09 ( or GPIO_B0_03 , or GPIO_EMC_18 , or GPIO_SD_B1_03 ).

However, on the same manual, at page 2564, the FLEXCAN1_TX is muxed on GPIO_AD_B1_09 and FLEXCAN1_RX on pin GPIO_AD_B1_08 : they are pratically inverted respect to what declared previously ...

The MCUXpresso Config Tools 5.0 software indicates the FLEXCAN1 pinout as indicated at page 280 of said reference manual.

Can NXP confirm that the user manual has an error on page 2564 ?

[miduo]

Hello,

The pinmux at page 2564 is not correct. The correct is:

FLEXCAN1_TX is muxed on GPIO_AD_B1_08

FLEXCAN1_RX on pin GPIO_AD_B1_09

We are sorry for the typo and will correct it in next version.

[GottiLuca]

Dear Mr. Li,

Many thanks for the clarification.

Regards,

L.Gotti