Hi!
We are trying to get working our diy IMX6ULL based pcb.
Reference design of NXP taken as based for board.
We are unable to make it working - nothing on UART.
It should start from onboard SPI flash which contain embedded linux image that works fine on development board.
SPI flash soldered preloaded with image.
Using oscilloscope I see that:
- VDD_HIGH_IN = 3.3V
- NVCC_CSI = 3.3V
- VDDA_ADC_3P3 = 3.3V
- NVCC_SD = 3.3V
- VDD_ARM_SOC_IN = 3.3V
- VDD_DRAM = 1.38V
- PMIC_ON_REQ = 3.0V
- ONOFF = 3.0V
- I see oscillation on XTALO:
But PMIC_STBY_REQ remains in 0V.
What are the possible issues can be here?
TEST_MODE connected to GND
BOOT_MODE1 = 3.0V
BOOT_MODE0 = 0V
LCD_DATA_4, LCD_DATA_5 and LCD_DATA_11 pulled up to 3.3V, all other LCD pins pulled down to achieve booting from QSPI which connected to onboard SPI flash IC using ECSPI1_CLK (CSI_DATA04), ECSPI1_SS0 (CSI_DATA05), ECSPI1_MOSI (CSI_DATA06), ECSPI1_MISO (CSI_DATA07).
igorpadykov, thank you for explanation. Finally I got IMX6ULL working on second pcb revision:
This custom board based on reference design which uses strange power circuit:
So I am wondering about some simplifications:
1. Can I power DRAM and ARM_SOC_IN from single 1.35V DC/DC IC ?
2. Can I power VDD_HIGH_IN, VDDA_ADC_3P3, NVCC_CSI, NVCC_SD by 3.3V without using 0 ohm resistors, e.g. from single power plane?
Will it leads for any troubles?
I need it to reduce pcb size and place components only on TOP of pcb.
Hi Almaz
PMIC_STBY_REQ is described on Figure 51-2. Chip reset scheme under external PMIC control
i.MX6ULL Reference Manual :
PMIC_STBY_REQ enters and exits PMIC standby
0->1 = enter standby
http://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf
Seems it is unrelevant to boot issues. For new board recommended first to run ddr test
i.MX6/7 DDR Stress Test Tool V3.00
and rebuild image with new calibration settings found from ddr test (put them
in uboot/board/freescale/mx6ullevk/imximage.cfg)
imximage.cfg\mx6ullevk\freescale\board - uboot-imx - i.MX U-Boot
Best regards
igor
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