Hi,
I am working on Custom board design based on the iMX8M processor & planning to interface KSZ9031RNX Ethernet PHY over Enet MAC.
I have used the same PHY, KSZ9031, with iMX6Q on another board. IMX6D/Q processor has a dedicated pin, ENET_REF_CLK, to accept 125MHz external clock from PHY to generate Transmit CLK at iMX6 MAC.
The iMX8M doesn't have a reference clock input pin. So the Tx_CLK will be generated by iMX8M & it will be used by PHY to generate a receive CLK for MAC.
How to configure ENET_TXC pin to generate Transmit CLK for PHY?
Thanks.
Hi All,
I am developing a custom board based on iMX8 MINI and PHY KSZ9031RNX.
Is CLK125_NDO signal used only for 'single LED" or "Dual led" setting at power up?
No connection with iMX8M processor?
Thanks
Giacomo
Hi Ritesh
for enet clock setection one can look at register
IOMUXC_GPR_GPR1. described in sect.8.2.4.2 GPR1 General Purpose
Register (IOMUXC_GPR_GPR1) i.MX8MDQ Reference Manual
https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf
Best regards
igor
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