I am working on Custom board design based on the iMX8M processor & planning to interface KSZ9031RNX Ethernet PHY over Enet MAC.
I have used the same PHY, KSZ9031, with iMX6Q on another board. IMX6D/Q processor has a dedicated pin, ENET_REF_CLK, to accept 125MHz external clock from PHY to generate Transmit CLK at iMX6 MAC.
The iMX8M doesn't have a reference clock input pin. So the Tx_CLK will be generated by iMX8M & it will be used by PHY to generate a receive CLK for MAC.
How to configure ENET_TXC pin to generate Transmit CLK for PHY?