I'd like to change the frequency of the iMX6UL DDR clock via the PFD divider.
I've been able to change register "CCM_ANALOG_PFD_528n" field "PFD2_FRAC" in uboot and see clock adjust accordingly. However, after changing the fractional divider value, the "PFD2_STABLE" bit never shows stable (1), it stays (0).
What is the proper sequence of register writes so that the PFD is stable after editing?
I've read through EB790 (https://www.nxp.com/docs/en/engineering-bulletin/EB790.pdf ) but it does not seem to give an example of changing the frequency divider, just disabling or bypassing altogether.