IMX6 GPIO pin not tristated at boot

[ericheurtel]

Hello,

Our board uses the IMX6DQP processor, and it seems a GPIO pin is driven low at boot while it's not documented.

The pin is ECSPI1-SCLK (ECSPI1_SCLK / ENET_RX_DATA3 / AUD5_TXC / KEY_COL0 / UART4_TX_DATA / <GPIO4_IO06> / DCIC1_OUT). Similar function pins (ESCPI1-MOSI, MISO and SS0) are tristated/PullUp.

The Datasheet says (§5.2 Boot Devices Interfaces Allocation) that Boot does not use this pin in any config, but instead uses EIM_D16 as SCLK signal when booting from ESCPI1.

I don't see anywhere why this signal is driven by boot code. This happens really just after Reset is deasserted, before the DCD block is read (I'm booting from eMMC SD2). See capture attached.

3v3 - SRC_POR# - ECSPI1_CLK

As this pin is conflicting on my board, I'd like to know if there is a way to avoid this signal to be driven at boot.

Thank you,

Eric Heurtel -

[ericheurtel]

OK I probably found the answer in the Datasheet, table 92 : unfortunately for me this "KEY_COL0" pin is different from other GPIOs and has an uncommon behaviour during reset, it is an output, with "unknown drive state". After Reset the pin goes to expected behaviour (PU-100k).

So it does not depend on Boot configuration, and there is probably nothing to do about it :smileysad:

See also https://community.nxp.com/thread/343744