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2 channel HSADC (40 Msps) and DMA

Question asked by lorenz.aebi@helbling.ch on Feb 4, 2019
Latest reply on Feb 25, 2019 by lorenz.aebi@helbling.ch

Hi all

 

we need the LPC4370 for sampling 2 ADC channels with 20 Msps each (not continous but 1000 samples per channel in a row). This works with the Audio PLL at 80 MHz very well. We are able to acquire 1000 samples per channel every 100us. We are able to transfer those aquired data to an external Memory area. The only problem we have is, that at the start of each such 1000 samples we have 8 samples from the last measurement (see picture). Can somebody help us to find where we can delete those values? We want to aquire 1000 samples every 10kHz and this should be pretty synchronous without a jitter. This aquisition we repeat for 20'000 times (within 2 seconds).

 

We start the DMA transfer all 10kHz:

LPC_GPDMA->CH[ADCHS_TO_MEMORY_DMA_CHANNEL].CONFIG &= ~GPDMA_DMACCxConfig_H;
/* Setup DMA Transfer */
bool success = Chip_GPDMA_Transfer(LPC_GPDMA,
    ADCHS_TO_MEMORY_DMA_CHANNEL,
    GPDMA_CONN_HSADC_Read,
    dstAddress,
    GPDMA_TRANSFERTYPE_P2M_CONTROLLER_DMA,
    length
);

 

We setup the HSADC the following way:

  /* Initialize HSADC */
  Chip_HSADC_Init(LPC_ADCHS);
  Chip_HSADC_SetPowerSpeed(LPC_ADCHS, false);
  Chip_HSADC_DisablePowerDownMode(LPC_ADCHS);
  Chip_HSADC_FlushFIFO(LPC_ADCHS);

  /* Setup FIFO trip points for interrupt/DMA to 8 samples, with packing */
  Chip_HSADC_SetupFIFO(LPC_ADCHS, FIFO_SAMPLES_ADCHS, true);
  Chip_HSADC_SetActiveDescriptor(LPC_ADCHS, TABLE_0, DESCRIPTOR_0);

  /* Software trigger only, 0x90 recovery clocks, add channel IF to FIFO entry */
  Chip_HSADC_ConfigureTrigger(LPC_ADCHS, HSADC_CONFIG_TRIGGER_SW,
      HSADC_CONFIG_TRIGGER_RISEEXT, HSADC_CONFIG_TRIGGER_NOEXTSYNC,
      HSADC_CHANNEL_ID_EN_ADD, RECOVERY_TIME_ADCHS_CLK);
  Chip_HSADC_SetupDescEntry(LPC_ADCHS, TABLE_0, DESCRIPTOR_0, (HSADC_DESC_CH(CHANNEL_0) |
      HSADC_DESC_BRANCH_NEXT | HSADC_DESC_MATCH(MATCH_VALUE) | HSADC_DESC_THRESH_NONE |
      HSADC_DESC_RESET_TIMER));
  Chip_HSADC_SetupDescEntry(LPC_ADCHS, TABLE_0, DESCRIPTOR_1, (HSADC_DESC_CH(CHANNEL_1) |
      HSADC_DESC_BRANCH_FIRST | HSADC_DESC_MATCH(MATCH_VALUE) | HSADC_DESC_THRESH_NONE |
      HSADC_DESC_RESET_TIMER | HSADC_DESC_UPDATE_TABLE));

  Chip_HSADC_EnablePower(LPC_ADCHS);
  /* Setup HSADC interrupts on group 0 - FIFO overrun error, and descriptor status */
  Chip_HSADC_EnableInts(LPC_ADCHS, GROUP_0, (HSADC_INT0_FIFO_OVERFLOW | HSADC_INT0_DSCR_ERROR));

  /* Update descriptor tables - needed after updating any descriptors */
  Chip_HSADC_UpdateDescTable(LPC_ADCHS, TABLE_0);

  Chip_HSADC_SWTrigger(LPC_ADCHS);

The HSADC is running the whole time and we just setup a new DMA transfer every 10kHz, could be this done better by adjusting the Descriptor tables. For me this is not clear and I tried different description table but without success. How should the descriptor table look like when we want to sample 2 channels with 20 Msps each and 1000 samples shall be aquired?

 

Thank you very much for your support and best regards

Lorenz

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