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SERDES clock in t2081

Question asked by Monali Haware on Jan 22, 2019
Latest reply on Jan 24, 2019 by Monali Haware

I have a custom board with t2081 processor. And in the process of bringing it up,  using Hard coded RCW. And over writing the RCW values using JTAG config file in code warrior.

SD1_REF_CLK1_P and SD1_REF_CLK1_N are attached to clock generators IC.

SD1_REF_CLK2_P and SD1_REF_CLK2_N are not connected to any clock generators. In fact the left "not conncetd" as shown in the snap attached.

 

Is it mandatory to connect SD1_REF_CLK2_P, SD1_REF_CLK2_N  to be connected clk source for board bring up?

                                                                                    OR

Can i just over write the PLL1,PLL2 to be 'disabled' in the JTAG config file as there is no option now to change the hardware connections.

 

Can any one help in this? I am stuck here.

 

 

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