summary: may I use schematics described in ERR009455 workaround on i.mx6ULL? Is it reliable?
Detailed version is below.
We are using the schematics from ERR009455 and i.mx6UL TO1.0 EVK in our custom i.mx6ULL-based design. In particular, Espon SG-210 external crystal oscillator (3.3V) output is supplied to XTALO via 1:3 voltage divider (500/1k). XTALI pad is connected to ground via external 18pF capacitor.
The design was created a long time ago with TO1.0 i.mx6 UltraLite in mind. We then switched to i.mx6ULL without changing the schematics.
Unfortunately, i.mx6ULL documentation (datasheet, reference manual and hardware development guide) provide insufficient, and even conflicting information concerning use of crystal oscillator. For instance,
1) IMX6ULLIEC 1.2 page 18: "XTALO must be directly driven by the external oscillator and XTALI is disconnected.". No mention of capacitor on XTALI pin.
2) IMX6ULLHDG rev 0 page 14: "A single ended external clock source can be used to drive XTALI. In this configuration, XTALO should be left externally floating".
So, I would like to request more information about using external 24M clock source on i.mx6ULL, as follows:
1) May I continue use our schematics (described in ERR009455 workaround) on i.mx6ULL? Is it reliable?
2) Do we still need to connect external capacitor to XTALI when externally driving XTALO?
3) What divider should we use in case of supplying external clock to XTALO? As far as I understand, in this configuration the internal inverting amplifier output is overridden by the external signal, which effectively lower voltage on XTALO pin. If so, should we meet 0.8*NVCC_PLL level requirements on XTALO signal?
4) IMX6ULLRM rev. 1 section "60.4.2 Bypass Configuration (32 kHz)" describes three option to supply external clock to RTC_XTALI/RTC_XTALO. Is the same applicable to 24MHz XTALI/XTALO as well?