In the datasheet of PN7462, there's a figure of pin planning.
Unlike the figures of the QFN package, which specify itself to be top view, the BGA package figure didn't provide the info.
So is this figure the top view or bottom view of the IC?
you can check the spec for the VFBGA64
I hope this will help you.
thanks for the info. I will add this missing info to the data sheet. It will be added with the next update.
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