I've read the SJC chapter in one or more of the Reference Manuals for i.MX6 series processors, but have not seen this question directly addressed.
It would seem logical that the features described as accessible for "Mode 1: No Debug - Maximum Security" would also be available to "Mode 2: Secure JTAG - High Security", but this is not expressly stated.
In fact, I would just assume that to be the case except the text for Mode 2 states "Any access to JTAG port is being checked."
for i.MX 6, are the "no debug" JTAG features available in Secure JTAG mode without need for the secret key authentication?
as the cited text for Mode 2 implies, is it true that access to all JTAG features, even those permitted for Mode 1 - No Debug (particularly boundary scan), are required to be enabled using challenge/response based authentication mechanism?