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Infinite Wait for Watchdog Reconfiguration Success (RCS) Bit

Question asked by Stephan de Wit on Jan 16, 2019
Latest reply on Jan 25, 2019 by Stephan de Wit

I have noticed on my S32K148 MCU that the watchdog timer is not being consistently configured when I am running through the debugger.  I have never seen this problem when running without the debugger.  The code in question is below.  This is the first code executed during device startup.  I want to disable the watchdog before initializing various peripherals.  Then when reaching the main loop the watchdog is then enabled.

/**
* Disable the watchdog timer.
*/
void watchdog_Disable(void)
{
   DISABLE_INTERRUPTS();

 

   // The Unlock write is only required when CS_ULK == 0
   // Out of reset CS_ULK == 1 making the Unlock write not necessary
   if (((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0U)
   {
      // Unlock watchdog
      WDOG->CNT = 0xD928C520;
      // wait until unlocked, CS_ULK == 1
      while (((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0U);
   }

 

   // Maximum timeout value
   WDOG->TOVAL = 0x0000FFFF;

 

   // Disable watchdog
   // CMD32EN = 1 : Enables support for 32-bit refresh/unlock command write words.
   // CLK = 1 : LPO clock
   // EN = 0 : Watchdog disabled.
   // UPDATE = 1 : Updates allowed. Software can modify the watchdog configuration registers within 128 bus    clocks after performing the unlock write sequence.
   WDOG->CS = WDOG_CS_CMD32EN(1) | WDOG_CS_CLK(1) | WDOG_CS_EN(0) | WDOG_CS_UPDATE(1);

   // wait until new configuration takes effect, CS_RCS == 1


   while (((WDOG->CS & WDOG_CS_RCS_MASK) >> WDOG_CS_RCS_SHIFT) == 0U);

 

   ENABLE_INTERRUPTS();
}

The device hangs on while (((WDOG->CS & WDOG_CS_RCS_MASK) >> WDOG_CS_RCS_SHIFT) == 0U);  near the bottom of the function. It appears that the RCS bit never gets set and this seems to happen because the device is still locked.  However the check above should ensure that the device is unlocked before trying to write to the watchdog control and status (CS) register. Below is a capture of the watchdog registers when the device hangs.

S32DS debugger when device hangs.

 

This does not happen consistently and I cannot reproduce this problem on demand.  When this problem does occur power cycling the MCU and starting a fresh debug session clears the problem.

  • Is there something wrong with my watchdog disable function? 
  • Am I running into a timing problem or race condition with the watchdog?
  • Is there a known issue configuring the watchdog while debugging? 

Any thoughts help is appreciated.

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