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A possible defect of Chip_ADC_SetClockRate()

Question asked by Jeremy Hsiao on Jan 13, 2019
Latest reply on Jan 15, 2019 by Alice_Yang



I'm writing to report possible defect of Chip_ADC_SetClockRate() in the LPCOpen 3.03. The content of this function is as below:


    Chip_ADC_SetDivider(pADC, ((Chip_Clock_GetSystemClockRate() + (rate>>2)) / rate) -1);


It could mistakenly set up the wrong divider to 0xff when the result of ((Chip_Clock_GetSystemClockRate() + (rate>>2)) / rate) is zero.


In case internal XTAL is used (clock-rate is 12MHz) instead of external clock-rate, the adc demo-code of Init_ADC() will call Chip_ADC_SetClockRate(LPC_ADC, ADC_MAX_CLOCK_RATE), in which ADC_MAX_CLOCK_RATE is 50MHz. This will make result of "((Chip_Clock_GetSystemClockRate() + (rate>>2)) / rate)" as 0. Thus after minus 1 the Divider will be set to 0xff.


It is recommended that some protection or warning is added within Chip_ADC_SetClockRate().