I'm using the K61_256BGA_120MHz_150MHz.bsdl BSDL file for the 32 bit Kinetis K61 (P/N MK61FN1MOVMJ12).. There is no Boundary Scan cell to drive DDR_CK_ on pin A10. There is a Boundary Scan cell on DDR_CK on pin A11. Is there actually a cell on pin A10 and the BSDL file is wrong or is there no cell on A10? A10, DDR_CKB, is defined as a linkage bit.. This is currently preventing me from developing a DDR memory test on the Boundary Scan test project I'm working on.