As I have seen so far, all the notes and examples of Cortex M4 of iMX7D are using uBoot in A7 to load the code into TCM (I guess OCRAM could be used for that as well) and then run from there.
But if the code size of M4 is 512k+, can a separated DDR or SRAM be assigned to M4 so uBoot can load the code into it and run from there for M4? If not, if the code size is larger than OCRAM, how to handle the situation?
Hi Zhiqun
one can look on imx-m4fwloader loading m4 code from Linux.
GitHub - NXPmicro/imx-m4fwloader: Tool for loading firmware to M4 core on i.MX6SX and 7D
Best regards
igor
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I have read APP note of An5127, so the same DDR can be used by both A7 and M4, not sure how does that work yet.