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Large Code Size of M4

Question asked by Zhiqun Hu on Jan 9, 2019
Latest reply on Jan 9, 2019 by Zhiqun Hu

As I have seen so far, all the notes and examples of Cortex M4 of iMX7D are using uBoot in A7 to load the code into TCM (I guess OCRAM could be used for that as well) and then run from there.

 

But if the code size of M4 is 512k+, can a separated DDR or SRAM be assigned to M4 so uBoot can load the code into it and run from there for M4? If not, if the code size is larger than OCRAM, how to handle the situation?  

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