S9KEA UART

[ryanshi]

I am using S9KEAZN64ACLH in E-bicycle, and now facing a uart issue. Please help to check, urgent. thanks!

I use both UART0 and UART1, and go to Stop(Deepsleep) mode.

1. They disable the UART0 then go to __WFI(), when wake the mcu via UAR1 interrupt, it will go to Hardfault interrupt. 2. If they donot disable the UART0, and wake the mcu via UAR1 interrupt, it will wake normally.

The simply code and schematic are as attachment, can you help to debug what is the reason of the hardfault? thanks!

And the IDE is KEIL.

[kerryzhou]

Hi ryan,

   Thank you for your interest in NXP kinetis product, I would like to provide service for you.
Customer is using S9KEAZN64ACLH chip, but I find the code is using the SKEAZ64xxx4, not SKEAZN64xxx2.
And the according head files is based on the KEA128.
Actually the KEA128 and the KEAZN64 have a lot of difference.
I think the hardfault interrupt should enter some area or register which the S9KEAZN64ACLH don't have.
I don't whether you test the clock or not? eg, bus clock or the system clock, is it correct on your side?
From your configuration, it should have problems, if you are really using S9KEAZN64ACLH, not the KEAZ64.
At first, tell you some difference:
1. KEAZN64 FLL factor is 1024, but KEA128 FLL factor is 1280
   From your code, I find you are using the 1280, SystemCoreClockUpdate function.
2. KEAZN64 core clock up to 40Mhz, but KEA128 core clock can up to 48Mhz.
   KEAZN64 bus clock up to  20Mhz, but KEA128 bus clock can up to 24Mhz.
3. KEAZN64 internal factory trimmed IRC is 31.25khz, but KEA128 internal IRC is 37.5Khz.
   But from your schematic, you are using the external 12Mhz. I don't know why you choose this crystal, 12Mhz is not support.
   If you want to get 40Mhz core clock, it's better to use the 10Mhz, then RDIV=256, then the FLL input clock is 39.0625khz, FLL factor is 1024, 39.0625KHZ*1024=40Mhz.
   From your code, I find you configure CLOCK_SETUP=1,  and use these code:
   #elif (CLOCK_SETUP == 1)
    #define CPU_XTAL_CLK_HZ                 32768u /* Value of the external crystal or oscillator clock frequency in Hz */
    #define CPU_INT_CLK_HZ                  32768u   /* Value of the internal oscillator clock frequency in Hz  */
    #define DEFAULT_SYSTEM_CLOCK            20971520u /* Default System clock value */
   Actually, it is not correct, XTAL clock is not correct, internal clock also not correct.
   Please modify it. Even you use the FEI mode, your configuration is not correct.
   You must make sure the clock configuration works OK.
   If you use the FEI mode, the internal IRC is 31.25khz, then 31.25khz*1024= 32Mhz.
   Then you need to use this core clock and bus clock to configurate your two UART with the correct baudrate.
  This is very important to make the MCU works stably.
4. Header file, you also can use the SKEAZN64 instead of the KEA128, you can find the header file in the MDK instal path:
   C:\Keil_v5\ARM\PACK\Keil\Kinetis_KEAxx_DFP\1.3.0\Device\Include
   start .s file, you also can use the SKEAZN64, you can find it from :
   C:\Keil_v5\ARM\PACK\Keil\Kinetis_KEAxx_DFP\1.3.0\Device\Source\ARM
   system_xxx.c you can use your own file, but you need to modfy the CPU_XTAL_CLK_HZ, CPU_INT_CLK_HZ,DEFAULT_SYSTEM_CLOCK
      #elif (CLOCK_SETUP == 1)
    #define CPU_XTAL_CLK_HZ                 10000000u /* Value of the external crystal or oscillator clock frequency in Hz if you want to get 40Mhz core clock in FEE mode */
    #define CPU_INT_CLK_HZ                  31250u   /* Value of the internal oscillator clock frequency in Hz  */
    #define DEFAULT_SYSTEM_CLOCK            32000000u /* Default System clock value */
  About the DEFAULT_SYSTEM_CLOCK  please note, if you BDIV is ICS->C2 |= (uint8_t)(ICS_C2_BDIV(0x01));, then it should be 32Mhz/2=16Mhz.
  SystemCoreClockUpdate function, modify
  ICSOUTClock *= 1280u;
 to
  ICSOUTClock *= 1024u;

After you modify the header file, .s file and the clock system, then you can test it again.
If you still have question about the hardfault about uart, I suggest you comment all other code, just leave two UART.
You can just configure one uart1, then use it as the wake up source, then test it whether it still enter the hardfault or not?
When you disable the UART0, please clear the accoridng status at first, then disable it.

If you still have problems after all the above test, please kindly let me know.
Wish it helps you!

Have a great day,
Kerry

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