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Memory bandwidth saving for IPU processing

Question asked by Kazuma Sasaki on Jan 7, 2019
Latest reply on Jan 11, 2019 by igorpadykov

Our system could not play the video normally. It seems that lack of memory bandwidth for our usage.

Therefore, we would like to reduce memory traffic between IPU and DRAM.

 

I have two ideas to reduce memory traffic after checked reference manual and community.

Is it available on i.MX6 platform? if it is not available or you know more suitable solutions, please give us any advice.

 

<Current data flow> data traffic between IPU and DRAM = 1920 x 1080 x 3byte per pixel x 2times = 11.86MB / frame

Input case :

 Video source(YUV422 720x480) -> CSI -> IC (CSC YUV422 to RGB24 and resizing to 1920x1080) -(IDMAC ch0)-> DRAM

Output case :

 DRAM -(IDMAC ch23)->DMFC->DP->DC->DI->Monitor(RGB24 1920x1080)

 

<Our ideas>

#1 CSC moving to DP

We expect data traffic reduce as below by CSC moving to DP.

data traffic between IPU and DRAM = 1920 x 1080 x 2byte per two pixels  x 2times = 3.95MB / frame

 

Input case :

 Video source(YUV422 720x480) -> CSI -> IC (resizing to 1920x1080) -(IDMAC ch0)-> DRAM

Output case :

 DRAM -(IDMAC ch23)->DMFC->DP(CSC YUV422 to RGB24)->DC->DI->Monitor(RGB24 1920x1080)

 

#2 video data directory transfer IC to DMFC

We expect data traffic reduce to 0 byte. but, I am not sure following flow is available or not.

Input case :

 Video source(YUV422 720x480) -> CSI -> IC (CSC YUV422 to RGB24 and resizing to 1920x1024) -(IDMAC ch21)-> DMFC

Output case :

 DMFC->DP->DC->DI->Monitor(RGB24 1920x1024)

 

<Note>

I checked following threads :

A Deep Dive into Image Processing for i.MX 6 Series Applications Processors 

 

Best Regards,

Kazuma Sasaki.

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