we can feed 125MHz clock to ENET_REF_Clk in three ways
Through EXTERNAL oscillator
As per my hardware design ENET_REF_CLK(V22) is already connected to PHY(KSZ9031) CLK125_NDO/LED_MODE pin,
and Phy(KSZ9031) is generating 125 MHz clock and forwarding it to ENET_REF_CLK(V22).
KSZ9031 having some errata#2
The 125MHz reference clock (CLK125_NDO pin) output has duty cycle variation when the KSZ9031RNX links up in 1000Base-T Slave mode, resulting in wide variation on the falling clock edge.
for workaround, I had applied a patch from below link which Set KSZ9031RNX to always link up in 1000Base-T Master mode by setting register 9h, bits [12:11] to ‘11’.
But still I'm not able to sync the clock with hardware timestamp using ptp.
Am i missing some thing or ENET_REF_CLK(v22) needs any configurations to be done?
Unfortunately ENET_REF_CLk(V22) ball didn't came out in my design to check whether clock is coming on to this ball.
Is there a way to check whether the clock is coming to ENET mac through software?
Thanks & Regards,