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IMX6ULL DDR3 DEBUG

Question asked by Dibin G on Dec 28, 2018
Latest reply on Jan 2, 2019 by Dibin G

Hi,

We designed a monitoring system using IMX6ULL processor and 1GB DDR3 RAM. There is two DDR3 chips with 512MB.

But, the first DDR chip with chip select 0 (CS0) is neither good nor working properly.

If we are removing the Bad DDR chip1, then can we use the second DDR chip with CS0 by shorting DRAM_CS0 and DRAM_CS1 ?

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