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Best sequence for MCF5484 when initializing SDR SDRAM

Question asked by Elizabeth Simon on Dec 26, 2018
Latest reply on Jan 9, 2019 by TomE

I've got an existing design using a MCF5484 that has been working fine for many years. Unfortunately, the Micron SDR SDRAM that we were using is now obsolete. We switched to an ISSI part and now have intermittent problems.

 

We are using two 256Mb, 4Mx16x4 parts with control and address wired in parallel to provide a 32 bit bus. My colleague has taken scope measurements of the SDRAM signals at power-up which show an attempt to program the MODE register in the SDRAM as the first activity on the bus. The data sheets for both SDRAM parts show that we should NOT be programming this register that early.

 

One thing that is puzzling to us is that we don't write to the ColdFire register that should program the MODE register until later in the startup sequence. What could cause this? Could it be happening when we program the chip select?

 

Since this design works with the Micron part and occasionally fails with ISSI, I suspect that the parts are reacting differently to something in the start-up sequence.

 

What is the best order to program the SDRAM registers?

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