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FPGA access in T1022 board

Question asked by Hemwant Rawat on Dec 26, 2018
Latest reply on Jan 1, 2019 by Hemwant Rawat

I am having a customised board with T1022 processor, we are having xilinx FPGA and is connected via IFC bus CS3.

Currently it is connected on IFC bus with CS3 , on doing respective settings of the chip select option register, property register and timing register in the uboot the same is reflected in uboot[by reading the cpu register] but on manually probing the Chip Select using CRO/scope no transition is visible on CS3.  

Currently value of the three FLASH timing register is 0xE00E00E, 0x0E001F00, 0x0E20001F.

We are also having CPLD on CS2 and are able to access CPLD .

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