PF8100 Thermal resistance and package dissipation ratings

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PF8100 Thermal resistance and package dissipation ratings

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wswong
NXP Employee
NXP Employee

Dear Colleague,

In datasheet of PF8100, Table 6. QFN56 thermal resistance and package dissipation ratings, what is the meaning of (2S6P)?  What is the environment test condition and setup of that thermal resistance and package dissipation rating test? Also how the test board implement? Other than PMIC, is there any other component on board. Our customer need details information on that and would you please help.  

Thanks and Best Regards,

WS

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jinyuzhang
NXP Employee
NXP Employee

Hi Ws

    Thanks for your question.  

     We use the following condition to create the simulation model.

     There is no specific layout pattern. Thermal resistance of each layer is uniformed depending on Cu density.

     thermal.png

PMIC and SBC question

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1,584 Views
jinyuzhang
NXP Employee
NXP Employee

Hi Ws

    Thanks for your question.  

     We use the following condition to create the simulation model.

     There is no specific layout pattern. Thermal resistance of each layer is uniformed depending on Cu density.

     thermal.png

PMIC and SBC question