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SC18IS602: Issues with Figure 20 in the datasheet

Question asked by Jay Catelli on Dec 17, 2018

When looking at the datasheet for SC18IS602 Figure 20 can be confusing given that during the idle state it should the SPI clock as both high and low for both CPOL states.   The question is what is the SPI clock state during idle?   Also is it possible to get the state of the SS outputs on this figure?   This way we can see the timing of the clock select relative to the clock and data.

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