About S9S08DZ60F2MLC pin-to-pin replacement S9S08DZ60F2CLC

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About S9S08DZ60F2MLC pin-to-pin replacement S9S08DZ60F2CLC

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chenyu1
Contributor I

The customer replaces the S9S08DZ60F2CLC with the S9S08DZ60F2MLC pin-to-pin. The chip uses the internal peripheral-TPM module to download the same program for debugging. The phenomenon of the two is different, and the cycle of the timer output is quite different.

We recommend that the customer test the S9S08DZ60F2MLC chip with a simple delay program, realize the cycle Delay 1s flip level, the oscilloscope actually measures the high and low level duration is 100ms, and the phenomenon above CLC is normal, the delay function is as follows:
         Void Delay_ms(word ms)
{
     Word i=0;
     Word cnt=655*ms;
     For(i=0;i<cnt;i++);
}@

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi 

I am not sure that I got properlly your problem

But remember that the mask 3M05C has an errata on the MCG 

https://www.nxp.com/docs/en/errata/MSE9S08DZ60_3M05C.pdf 

I do not know if you are having this errata problem

Regards

Vicente

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