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LS1046A PHY-less SGMII in U-Boot

Question asked by Thomas Scarsbrook on Dec 14, 2018
Latest reply on Dec 18, 2018 by bpe

Hi,

 

I have a custom LS1046A board. All 4 lanes on SERDES1 are configured as SGMII (0x3333 in the RCW) however there is no PHY on the board.

 

All lanes are currently showing the same behaviour, however I'll focus on SGMII.9

 

I have my own MDIO init function under boards/...../eth.c, in which I create and register a new mii_dev. I use the memac_mdio_read/write/reset functions, and have priv pointing to 0x1AF1030, which is MDIO9 for EMAC9 according to Table 5-17 in the DPAA reference manual.

I also set MDEV_PORT in SGMIIDCR1 (0x1EA1834) to 0x1.

I call

fm_info_set_phy_address(FM1_DTSEC9, 0x1)

fm_info_set_mdio(FM1_DTSEC9, mii_dev)         // Using the mii_dev created above

 

As far as I can tell this is in line with how LS1046AQDS sets up its SERDES, as I believe this has some 2.5G SGMII ports without PHY's (as given away by other users on this forum and by comment in the code).

 

If I then boot, and run mdio list, I get:

=> mdio list

Internal MDIO 9:

1 - Generic PHY <--> FM1@DTSEC9

However, if I run mdio read:

=> mdio read FM1@DTSEC9 0-0x1b

Reading from bus Internal MDIO 9

PHY at address 1:

0 - 0x0

1 - 0x0

2 - 0x0

3 - 0x0

4 - 0x0

5 - 0x0

6 - 0x0

7 - 0x0

8 - 0x0

9 - 0x0

10 - 0x0

11 - 0x0

12 - 0x0

13 - 0x0

14 - 0x0

15 - 0x0

16 - 0x0

17 - 0x0

18 - 0x0

19 - 0x0

20 - 0x0

21 - 0x0

22 - 0x0

 

However, performing a memory dump at 0x1AF1030 shows that there is some non-zero data.

 

Then, when I try to communicate I get:

FM1@DTSEC9: Tx error, txbd->status = 0x8800

FM1@DTSEC9: Tx buffer not ready, txbd->status = 0x8800

 

What am I missing?

 

Thanks,

Thomas

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