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LS1043 interrupt-map fixup bug in u-boot?

Question asked by Shiva Pandit on Dec 2, 2018
Latest reply on Jan 24, 2019 by Shiva Pandit

Is there an bug in the logic how the legacy interrupt routing is fixed up in the u-boot? I'm referring to the  `_fdt_fixup_pci_msi()` routine, in the `arch/arm/cpu/armv8/fsl-layerscape/fdt.c` file:

 

if (rev > REV1_0) {
tmp[1][6] = cpu_to_fdt32(val + 1);
tmp[2][6] = cpu_to_fdt32(val + 2);
tmp[3][6] = cpu_to_fdt32(val + 3);
} else {
tmp[1][6] = cpu_to_fdt32(val);
tmp[2][6] = cpu_to_fdt32(val);
tmp[3][6] = cpu_to_fdt32(val);
}

Looking at the documentation, Table 5-1, Interrupt Assignments, all 4 legacy interrupts (INTA, INTB, INTC, INTD) are routed to same interrupt number in rev1_1. So, shouldn't the first line in the above code above be:

if (rev > REV1_0) {
tmp[1][6] = cpu_to_fdt32(val);
tmp[2][6] = cpu_to_fdt32(val);
tmp[3][6] = cpu_to_fdt32(val);
} else {

tmp[1][6] = cpu_to_fdt32(val + 1);
tmp[2][6] = cpu_to_fdt32(val + 2);
tmp[3][6] = cpu_to_fdt32(val + 3);
}

I hope I'm wrong; can someone correct me please? Thanks.

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