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S32K142 LPSPI don't Receive frame(master mode)

Question asked by 风超 张 on Dec 2, 2018
Latest reply on Dec 7, 2018 by 风超 张

Hi NXP Team,

 

I'm facing an issue related to SPI read operation on S32K142.

I tried to read the status register of a Infineon IC(TLE9180D). MISO line,I don't receive any frame .I confirm the data obout send frame ,that is  OK .

 

void vdg_SPI_init_master(void)
{

PCC->PCCn[PCC_LPSPI0_INDEX] = 0; /* Disable clocks to modify PCS ( default) */
PCC->PCCn[PCC_LPSPI0_INDEX] = 0xC6000000; /* Enable PCS=SPLL_DIV2 (40 MHz func'l clock) */

LPSPI0->CR = 0x00000000; /* Disable module for configuration */
LPSPI0->IER = 0x00000000; /* Interrupts not used */
LPSPI0->DER = 0x00000000; /* DMA not used */
LPSPI0->CFGR0 = 0x00000000; /* Defaults: */

LPSPI0->CFGR1 = 0x00000001;   /* Configurations: master mode*/

LPSPI0->TCR   = 0x12000017;   /* Transmit cmd: PCS3, 16 bits, prescale func'l clk by 4, etc:SPI BUS:10M=40M/4*/

LPSPI0->CCR   = 0x04090808;   /* Clock dividers based on prescaled func'l clk of 100 nsec */

LPSPI0->FCR   = 0x00000003;   /* RXWATER=0: Rx flags set when Rx FIFO >0 */

LPSPI0->CR    = 0x00000009;   /* Enable module for operation */

return;

}

void vdg_SPI_transmit_24bits ( u4 send )
{
/* Wait for Tx FIFO available */
while((LPSPI0->SR & LPSPI_SR_TDF_MASK)>>LPSPI_SR_TDF_SHIFT==0)
{
;/* do nothing */
}

LPSPI0->TDR = send; /* Transmit data */
LPSPI0->SR |= LPSPI_SR_TDF_MASK; /* Clear TDF flag */

return;
}

u4 u4g_SPI_receive_24bits (void)
{
u4 recieve = 0;

/* Wait at least one RxFIFO entry */
while((LPSPI0->SR & LPSPI_SR_RDF_MASK)>>LPSPI_SR_RDF_SHIFT==0)
{
;/* do nothing */
}

recieve= LPSPI0->RDR; /* Read received data */

LPSPI0->SR |= LPSPI_SR_RDF_MASK; /* Clear RDF flag */

return recieve; /* Return received data */
}

 

for(;;) {

spi_tx_frame[0] = 0x32;
spi_tx_frame[1] = 0x00;
spi_tx_frame[2] = 0x00;

send = (spi_tx_frame[0]<<16) | (spi_tx_frame[1]<<8) | (spi_tx_frame[2]<<0);

spi_tx_frame[2] = crc3_high_first(send);

send = (spi_tx_frame[0]<<16) | (spi_tx_frame[1]<<8) | (spi_tx_frame[2]<<0);

vdg_SPI_transmit_24bits(send); /* Transmit half word (16 bits) on LPSPI1 */

rec = u4g_SPI_receive_24bits(); /* Receive half word on LSPI1 */

spi_rx_frame[0] = (u1)(rec>>16);
spi_rx_frame[1] = (u1)(rec>>8);
spi_rx_frame[2] = (u1)(rec>>0);

counter++;
//vdg_SPI_TLE9180D_cof();
}

 

void vdg_SPI_transmit_24bits ( u4 send )
{
/* Wait for Tx FIFO available */
while((LPSPI0->SR & LPSPI_SR_TDF_MASK)>>LPSPI_SR_TDF_SHIFT==0)
{
;/* do nothing */
}

LPSPI0->TDR = send; /* Transmit data */
LPSPI0->SR |= LPSPI_SR_TDF_MASK; /* Clear TDF flag */

return;
}

u4 u4g_SPI_receive_24bits (void)
{
u4 recieve = 0;

/* Wait at least one RxFIFO entry */
while((LPSPI0->SR & LPSPI_SR_RDF_MASK)>>LPSPI_SR_RDF_SHIFT==0)
{
;/* do nothing */
}

recieve= LPSPI0->RDR; /* Read received data */

LPSPI0->SR |= LPSPI_SR_RDF_MASK; /* Clear RDF flag */

return recieve; /* Return received data */
}

/*---------------TLE9180D config--------------*/
/* 多个字节 的crc校验代码 */
u1 crc8_high_first(u1 *ptr, u1 len)
{
u1 i;
u1 crc=0x00; /* 计算的初始crc值 */

while(len--)
{
crc ^= *ptr++; /* 每次先与需要计算的数据异或,计算完指向下一数据 */
for (i=8; i>0; --i) /* 下面这段计算过程与计算一个字节crc一样 */
{
if (crc & 0x80)
crc = (crc << 1) ^ 0x4D;
else
crc = (crc << 1);
}
}

return (crc);
}

u1 crc3_high_first(u4 spi_frame)
{
u1 i;
u4 crc_cal=spi_frame << 8; /* 计算的初始crc值 */
u1 crc;

for (i=21; i>0; --i) /* 下面这段计算过程与计算一个字节crc一样 */
{
if (crc_cal & 0x80000000)
crc_cal = (crc_cal << 1) ^ 0x60000000;
else
crc_cal = (crc_cal << 1);
}

crc = (u1)(crc_cal>>29);
return (crc);
}

Outcomes