Issues debugging MIMXRT1050-EVK development board with QSPI Flash using MCUXpresso.

[mike4]

We are using the MIMXRT1050-EVK (not EVKB) development board rev A1.  Using MCUXpresso 10.2.1 with SDK 2.4.2 installed, we have been able to download the hello_word project (which is XIP) to the Hyperflash and boot from it successfully.  We plan on using QSPI flash in our actual product so we are trying to do the same using the QSPI flash. 

Following AN12183, we have removed the Hyperflash from the board and added the 0 Ohm resistors to R153 to R158. We have updated the DapLink firmware to k20dx_mimxrt1050_evk_qspi_if_crc_bin according to the directions.  Question 1 – how do we know the firmware has updated correctly?

Under Project settings, we changed the Flash size to 0x800000 and the Flash driver to MIMXRT1050-EVK_IS25WP064A.cfx

Erasing the QSPI appears to work correctly as shown by the log at the end of this post:

However, when trying to program the QSPI flash by clickingg Debug in the Quickstart Menu we appear to get an error as can be seen in the programming log after the erase log. It seems to imply that the Flash programmed ok but was not able to boot.  Did we need to modify the Boot Image to run from QSPI instead of the Hyperflash?

Erase Flash log:

Executing flash operation 'Erase' (Erase flash) - Tue Nov 27 16:09:16 EST 2018

Checking MCU info...

Scanning for targets...

Executing flash action...

MCUXpresso IDE RedlinkMulti Driver v10.2 (Jul 25 2018 11:25:37 - crt_emu_cm_redlink.exe build 555)

(  0) Reading remote configuration

Wc(03). No cache support.

Found chip XML file in C:/iMX1050RT/temp/evkimxrt1050_hello_world/Debug\MIMXRT1052xxxxB.xml

(  5) Remote configuration complete

Reconnected to existing link server

Connecting to probe 1 core 0:0 (using server started externally) gave 'OK'

Probe Firmware: DAPLink CMSIS-DAP (ARM)

Serial Number:  0227000032624e45003400197ece004e7e61000097969900

VID:PID:  0D28:0204

USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#7&5d84601&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

Using memory from core 0:0 after searching for a good core

( 30) Emulator Connected

( 40) Debug Halt

( 50) CPU ID

debug interface type      = Cortex-M7 (DAP DP ID 0BD11477) over SWD TAP 0

processor type            = Cortex-M7 (CPU ID 00000C27) on DAP AP 0

number of h/w breakpoints = 8

number of flash patches   = 0

number of h/w watchpoints = 4

Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info: <None>

Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.

Content of CoreSight Debug ROM(s):

RBASE E00FD000: CID B105100D PID 000008E88C ROM dev (type 0x1)

ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM dev (type 0x1)

ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM dev (type 0x1)

ROM 3 E000E000: CID B105E00D PID 04000BB00C ChipIP dev SCS (type 0x0)

ROM 3 E0001000: CID B105E00D PID 04000BB002 ChipIP dev DWT (type 0x0)

ROM 3 E0002000: CID B105E00D PID 04000BB00E ChipIP dev (type 0x0)

ROM 3 E0000000: CID B105E00D PID 04000BB001 ChipIP dev ITM (type 0x0)

ROM 2 E0041000: CID B105900D PID 04001BB975 ARCH 23B:4A13r0 CoreSight dev type 0x13 Trace Source - core

ROM 2 E0042000: CID B105900D PID 04004BB906 CoreSight dev type 0x14 Debug Control - Trigger, e.g. ECT

ROM 1 E0040000: CID B105900D PID 04000BB9A9 CoreSight dev type 0x11 Trace Sink - TPIU

ROM 1 E0043000: CID B105F00D PID 04001BB101 System dev (type 0x0)

Inspected v.2 External Flash Device on SPI MIMXRT1050-EVK_IS25WP064A.cfx

Image 'MIMXRT1050-EVK_IS25WP064A Jul 25 2018 11:27:33'

Non-standard DAP stride detected - 1024 bytes

NXP: MIMXRT1052xxxxB

( 65) Chip Setup Complete

Connected: was_reset=false. was_stopped=false

( 70) License Check Complete

Opening flash driver MIMXRT1050-EVK_IS25WP064A.cfx

Sending VECTRESET to run flash driver

Mass Erase flash at 0x60000000

Closing flash driver MIMXRT1050-EVK_IS25WP064A.cfx

MassErase completed (in 16401ms)

Flash programming log:

Executing flash operation 'Program' (Program file into flash: evkimxrt1050_hello_world.axf) - Tue Nov 27 17:08:05 EST 2018

Checking MCU info...

Scanning for targets...

Executing flash action...

MCUXpresso IDE RedlinkMulti Driver v10.2 (Jul 25 2018 11:25:37 - crt_emu_cm_redlink.exe build 555)

(  0) Reading remote configuration

Wc(03). No cache support.

Found chip XML file in C:/iMX1050RT/temp/evkimxrt1050_hello_world/Debug\MIMXRT1052xxxxB.xml

(  5) Remote configuration complete

Reconnected to existing link server

Connecting to probe 1 core 0:0 (using server started externally) gave 'OK'

Probe Firmware: DAPLink CMSIS-DAP (ARM)

Serial Number:  0227000032624e45003400197ece004e7e61000097969900

VID:PID:  0D28:0204

USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#7&5d84601&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

Using memory from core 0:0 after searching for a good core

( 30) Emulator Connected

( 40) Debug Halt

( 50) CPU ID

debug interface type      = Cortex-M7 (DAP DP ID 0BD11477) over SWD TAP 0

processor type            = Cortex-M7 (CPU ID 00000C27) on DAP AP 0

number of h/w breakpoints = 8

number of flash patches   = 0

number of h/w watchpoints = 4

Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info: <None>

Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.

Content of CoreSight Debug ROM(s):

RBASE E00FD000: CID B105100D PID 000008E88C ROM dev (type 0x1)

ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM dev (type 0x1)

ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM dev (type 0x1)

ROM 3 E000E000: CID B105E00D PID 04000BB00C ChipIP dev SCS (type 0x0)

ROM 3 E0001000: CID B105E00D PID 04000BB002 ChipIP dev DWT (type 0x0)

ROM 3 E0002000: CID B105E00D PID 04000BB00E ChipIP dev (type 0x0)

ROM 3 E0000000: CID B105E00D PID 04000BB001 ChipIP dev ITM (type 0x0)

ROM 2 E0041000: CID B105900D PID 04001BB975 ARCH 23B:4A13r0 CoreSight dev type 0x13 Trace Source - core

ROM 2 E0042000: CID B105900D PID 04004BB906 CoreSight dev type 0x14 Debug Control - Trigger, e.g. ECT

ROM 1 E0040000: CID B105900D PID 04000BB9A9 CoreSight dev type 0x11 Trace Sink - TPIU

ROM 1 E0043000: CID B105F00D PID 04001BB101 System dev (type 0x0)

Inspected v.2 External Flash Device on SPI MIMXRT1050-EVK_IS25WP064A.cfx

Image 'MIMXRT1050-EVK_IS25WP064A Jul 25 2018 11:27:33'

Non-standard DAP stride detected - 1024 bytes

NXP: MIMXRT1052xxxxB

( 65) Chip Setup Complete

Connected: was_reset=false. was_stopped=true

( 70) License Check Complete

Loading 'evkimxrt1050_hello_world.axf' ELF 0x60000000 len 0x5A78

Opening flash driver MIMXRT1050-EVK_IS25WP064A.cfx

Sending VECTRESET to run flash driver

Writing 23160 bytes to address 0x60000000 in Flash

1 of 1 (  0) Writing pages 0-0 at 0x60000000 with 23160 bytes

(  0) at 60000000: 0 bytes - 0/23160

( 70) at 60000000: 16384 bytes - 16384/23160

(100) at 60004000: 16384 bytes - 32768/23160

Erased/Wrote page  0-0 with 23160 bytes in 1387msec

Closing flash driver MIMXRT1050-EVK_IS25WP064A.cfx

(100) Finished writing Flash successfully.

Flash Write Done

Loaded 0x5A78 bytes in 2052ms (about 11kB/s)

Reset target (system)

Starting execution using system reset

error on restart - Ee(07). Bad ACK returned from status - wire error.

(100) Target Connection Failed

Unable to perform operation!

Command failed with exit code 1

[mike4]

Finally got it to work. If anyone is interested we changed the following routine in the evkbimxrt1050_flexspi_nor_config.c file to:

const flexspi_nor_config_t Serialflash_config =
{
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally,
.csHoldTime = 3u,
.csSetupTime = 3u,
.columnAddressWidth = 0u,
.deviceModeCfgEnable = 0,
.waitTimeCfgCommands = 0,
// Disable DDR mode, Wordaddassable, Safe configuration, Differential clock
.controllerMiscOption =
// (1u << kFlexSpiMiscOffset_DdrModeEnable) |
// (1u << kFlexSpiMiscOffset_WordAddressableEnable) |
// (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) |
// (1u << kFlexSpiMiscOffset_DiffClkEnable)|
0,
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_60MHz,
.lutCustomSeqEnable = 0,
.sflashA1Size = 8u * 1024u * 1024u,
.dataValidTime = {16u, 16u},
.busyOffset = 1,
.busyBitPolarity = 0,
.lookupTable =
{
// Read LUTs
//[4 * NOR_CMD_LUT_SEQ_IDX_READ] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x03, RADDR_SDR, FLEXSPI_1PAD, 0x18),
//[4 * NOR_CMD_LUT_SEQ_IDX_READ+1] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD, 0x04,STOP, FLEXSPI_1PAD, 0x00),
[4 * NOR_CMD_LUT_SEQ_IDX_READ] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x6b, RADDR_SDR, FLEXSPI_1PAD, 0x18),
[4 * NOR_CMD_LUT_SEQ_IDX_READ+1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x08,READ_SDR, FLEXSPI_4PAD, 0x04),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 32u * 1024u,
.ipcmdSerialClkFreq= 0,
};

It now boots from the QSPI flash.