U-Boot built by SDK v2.0-1703 for LS1043ARDB

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U-Boot built by SDK v2.0-1703 for LS1043ARDB

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duc_le
Contributor I

I used the SDK to build an uboot image for the ls1043ardb board. It generated the the version "2016.092.0+ga06b209".

However the current version on my board is "2017.07-g503eff0". How can I get this uboot source code for this 2017 version so that I could run on the same environment? I tried to program the alternate bank with the built uboot image 2016.092.0+ga06b209 and run it. Some how the Uboot complained about "Bad firmware image ...":

U-Boot 2016.092.0+ga06b209 (Nov 22 2018 - 16:07:32 -0500)

SoC: LS1043AE Rev1.1 (0x87920011)
Clock Configuration:
CPU0(A53):1600 MHz CPU1(A53):1600 MHz CPU2(A53):1600 MHz
CPU3(A53):1600 MHz
Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz
Reset Configuration Word (RCW):
00000000: 08100010 0a000000 00000000 00000000
00000010: 14550002 80004012 e0025000 c1002000
00000020: 00000000 00000000 00000000 00038800
00000030: 00000000 00001101 00000096 00000001
Model: LS1043A RDB Board
Board: LS1043ARDB, boot from vBank 4
CPLD: V2.0
PCBA: V5.0
SERDES Reference Clocks:
SD1_CLK1 = 156.25MHZ, SD1_CLK2 = 100.00MHZ
I2C: ready
DRAM: Initializing DDR....
Detected UDIMM Fixed DDR on board
2 GiB (DDR4, 32-bit, CL=11, ECC off)
SEC0: RNG instantiated
SEC Firmware: Bad firmware image (not a FIT image)
Not a microcode
PSCI: PSCI does not exist.
Waking secondary cores to start from ffcfe000
All (4) cores are up.
Using SERDES1 Protocol: 5205 (0x1455) 
Flash: 128 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment

EEPROM: NXID v1
In: serial
Out: serial
Err: serial
Net: Fman1: Data at 0000000060300000 is not a firmware
PCIe0: pcie@3400000 disabled
PCIe1: pcie@3500000 Root Complex: no link
PCIe2: pcie@3600000 Root Complex: no link
No ethernet found.
Hit any key to stop autoboot: 0

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duc_le
Contributor I

When I boot the board from bank 0, it shows the LSDK version 17.09. Is it ok to work with LSDK 18.09, the link you provided?

Here is the console output from bank 0:

U-Boot 2017.07-g503eff0 (Sep 26 2017 - 15:00:50 +0800)

SoC: LS1043AE Rev1.1 (0x87920011)
Clock Configuration:
CPU0(A53):1600 MHz CPU1(A53):1600 MHz CPU2(A53):1600 MHz
CPU3(A53):1600 MHz
Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz
Reset Configuration Word (RCW):
00000000: 08100010 0a000000 00000000 00000000
00000010: 14550002 80004012 e0025000 c1002000
00000020: 00000000 00000000 00000000 00038800
00000030: 00000000 00001101 00000096 00000001
Model: LS1043A RDB Board
Board: LS1043ARDB, boot from vBank 0
CPLD: V2.0
PCBA: V5.0
SERDES Reference Clocks:
SD1_CLK1 = 156.25MHZ, SD1_CLK2 = 100.00MHZ
I2C: ready
DRAM: Initializing DDR....
Detected UDIMM Fixed DDR on board
1.9 GiB (DDR4, 32-bit, CL=11, ECC off)
Using SERDES1 Protocol: 5205 (0x1455)
SEC0: RNG instantiated
PPA Firmware: Version LSDK-17.09
Firmware 'Microcode version 0.0.1 for LS1021a r1.0' for 1021 V1.0
QE: uploading microcode 'Microcode for LS1021a r1.0' version 0.0.1
Flash: 128 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
EEPROM: NXID v1
In: serial
Out: serial
Err: serial
Net: Fman1: Uploading microcode version 108.4.9
PCIe0: pcie@3400000 disabled
PCIe1: pcie@3500000 Root Complex: no link
PCIe2: pcie@3600000 Root Complex: no link
FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3 [PRIME], FM1@DTSEC4, FM1@DTSEC5, FM1@DTSEC6, FM1@TGEC1
Hit any key to stop autoboot: 0

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Pavel
NXP Employee
NXP Employee

It looks like that LSDK was used for u-boot building.

NXP offers LSDK 18.09 for LS1043ARDB board:

https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/qoriq-lay...


Have a great day,
Pavel Chubakov

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