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Can't flash kw2xd since Low Power Mode enabled

Question asked by Olivier Fauchon on Nov 18, 2018
Latest reply on Nov 28, 2018 by Victor Jimenez

Hi, 

 

I'm working on phyWAVE  KW2xD ARM Cortex-M4 board (KW22D512VHA5) with RIOT-OS. 

I had no prior problems for flashing, debugging, running my code through OpenOCD / JLink / SWD interface. 

 

But yesterday, I changed some code to enable Low Power Mode (LLS), and I flashed the new code.

Since this update, I can't connect anymore the board with JLink/SWD .

 

Here is what I get when I try to flash : 

 

Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
swd
Info : add flash_bank kinetis kx.flash
adapter speed: 1000 kHz
none separate
cortex_m reset_config sysresetreq
Info : No device selected, using first device.
Info : J-Link ARM V8 compiled Nov 28 2014 13:44:46
Info : Hardware version: 8.00
Info : VTarget = 2.685 V
Info : clock speed 1000 kHz
Info : SWD DPIDR 0x2ba01477
Error: MDM: failed to read ID register
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477

....
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477

Info : SWD DPIDR 0x2ba01477
Error: Could not initialize the debug port
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* kx.cpu cortex_m little kx.cpu unknown
Info : SWD DPIDR 0x2ba01477
Error: MDM: failed to read ID register
Info : SWD DPIDR 0x2ba01477

Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477
.....
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477
Info : SWD DPIDR 0x2ba01477
Error: Could not initialize the debug port
Error: Target not examined, reset NOT asserted!
in procedure 'reset'
in procedure 'ocd_bouncer'

 

Can you tell me if  Low Power Modes can affect JTAG / SWD ?

 

Is my board/MCU bricked ?  Are there workaround to recover it ? 

 

What are the safeguards to avoid this situation ? 

 

I was thinking about a delay at startup before enabling Low Power Modes, so programmer always have a couple

of seconds to halt processor.

 

Thanks

 

Olivier Fauchon 

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