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S32K144 CAN receive problem

Question asked by 张 凌皓 on Nov 14, 2018
Latest reply on Nov 15, 2018 by 张 凌皓

S32Hello!When I use the S32K144 chip CAN peripheral function Now I have a problem configuring CAN0 0-2 mailbox 0 mailbox receive ID: 0x7E0 1 mailbox receive ID: 0x294 Configure to receive interrupts, set breakpoints in the CAN receive interrupt function, Computer sends a frame 0 x7e0 message, program stopped at a breakpoint, click run, recurrence of 0 x7e0 message, the program can't stop at the breakpoint, then send 0 x294 message, program again stopped at a breakpoint, click run, stop at the breakpoint again, check into the reason, the last IFLAG1 = 1, said email have received 0 0 x7e0 message, the last time did not enter the interrupt. Looking for the cause, it is found that reading the ID, length, and data content will cause the interrupt to stop entering, and the comment point RxID = -- by the end of the code, the problem does not exist.But the data of the received frames cannot be obtained. Receive mask code is 0x7FF, standard frame, Structure generated by PE configuration: Const flexcan_user_config_t canCom1_InitConfig0 = { . Fd_enable = false, Pe_clock = FLEXCAN_CLK_SOURCE_SOSCDIV2, Max_num_mb = 32, Num_id_filters = FLEXCAN_RX_FIFO_ID_FILTERS_8, . Is_rx_fifo_needed = false, FlexcanMode = FLEXCAN_NORMAL_MODE, Content = FLEXCAN_PAYLOAD_SIZE_8, The bitrate = { . PropSeg = 7, . PhaseSeg1 = 4, PhaseSeg2 = 1, . PreDivider = 0, . RJumpwidth = 1 }, . Bitrate_cbt = { . PropSeg = 7, . PhaseSeg1 = 4, PhaseSeg2 = 1, . PreDivider = 0, . RJumpwidth = 1 }, Transfer_type = FLEXCAN_RXFIFO_USING_INTERRUPTS, . RxFifoDMAChannel = 0 u }; CAN initialization: { FLEXCAN_DRV_Init (INST_CANCOM1, & canCom1_State, & canCom1_InitConfig0); FLEXCAN_DRV_SetRxMaskType (INST_CANCOM1 FLEXCAN_RX_MASK_INDIVIDUAL); // set the mailbox mask type For (I = 0;I < RX0MB_LEN;I++) { Rx0MbInfo. Msg_id_type = rx0Buf [I] msg_id_type; FLEXCAN_DRV_ConfigRxMb (INST_CANCOM1, rx0Buf [I] mb_idx, & Rx0MbInfo, rx0Buf [I] msg_id); FLEXCAN_DRV_SetRxIndividualMask (INST_CANCOM1, rx0Buf [I] msg_id_type, rx0Buf [I] mb_idx, rx0Buf [I] id_mask); } // open mailbox receive interrupt For (I = 0;I < RX0MB_LEN;I++) { G_flexcanBase [INST_CANCOM1] - > IMASK1 | = ((rx0Buf [I] mb_interrupt_enable) < < rx0Buf [I] mb_idx); } }

The following is the contents of the interrupt receiving function:

{ Uint32_t mb_idx;

Uint32_t intStsFlag = FLEXCAN_HAL_GetAllMsgBuffIntStatusFlag (g_flexcanBase [INST_CANCOM1]); // determine mailbox data status

For (mb_idx = 0;Mb_idx < RX0MB_LEN;Mb_idx + +)

{ Uint32_t mask = (uint32_t) 0x01 < < mb_idx;

If (intStsFlag&mask)

{ FLEXCAN_HAL_ClearMsgBuffIntStatusFlag (g_flexcanBase [INST_CANCOM1], mask); Break; } } If (rx0Buf [mb_idx] msg_id_type = = FLEXCAN_MSG_ID_EXT) { RxID = (CAN0->RAMn[mb_idx* msg_size + 1] & can_wmbn_id_mask) >> CAN_WMBn_ID_EXT_SHIFT; } The else { RxID = (CAN0->RAMn[mb_idx* msg_size + 1] & can_wmbn_id_mask) >> CAN_WMBn_ID_STD_SHIFT; } RxLENGTH = (CAN0->RAMn[mb_idx* msg_size + 0] & CAN_WMBn_CS_DLC_MASK) >> CAN_WMBn_CS_DLC_SHIFT; For (j = 0;J < 2;J++) { RxDATA[j] = CAN0->RAMn[mb_idx*MSG_BUF_SIZE + 2 + j]; RxDATA [j] = reversebytes_uint32 (RxDATA [j]);/ / the Size end swap }

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