Hello,
I'm hoping to create a board using the LPC11D14 and am curious how exactly the SWD/JTAG header is to be connected to the processor in order to flash the part correctly using an LPC-LINK 2.
I appreciate any help!
Solved! Go to Solution.
Hi,
Please check the image below.
In addition please check the following thread:
Design Considerations for Debug
For debugging purposes, it is useful to provide access to the ISP entry pin PIO0_1. This pin can be used to recover the part from configurations which would disable the SWD port such as improper PLL configuration, reconfiguration of SWD pins as ADC inputs, entry into Deep power-down mode out of reset, etc. This pin can be used for other functions such as GPIO, but it should not be held low on power-up or reset.
Have a great day,
Sol
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Hi,
Please check the image below.
In addition please check the following thread:
Design Considerations for Debug
For debugging purposes, it is useful to provide access to the ISP entry pin PIO0_1. This pin can be used to recover the part from configurations which would disable the SWD port such as improper PLL configuration, reconfiguration of SWD pins as ADC inputs, entry into Deep power-down mode out of reset, etc. This pin can be used for other functions such as GPIO, but it should not be held low on power-up or reset.
Have a great day,
Sol
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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