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How can I tune QSPI?

Question asked by YongJin Choi on Nov 12, 2018
Latest reply on Nov 27, 2018 by YongJin Choi

I'm using RT1050 mcu with MT25QL512 of micron.

 

I'm working well to read and erase and write to flash with SDR mode.

 

And MT25QL512 supports DDR mode. so I changes operation mode of flash from SDR to DDR

 

But in DDR mode, it doesn't work to read ID of flash

 

In SDR, I configure flexspi as below and it work well ( ID reads as 0x1020BA20)

flexspi_device_config_t deviceconfig = {
    .flexspiRootClk = 100000000,
    .flashSize = FLASH_SIZE,

     ...

}

CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24);   /* Set PLL3 PFD0 clock 360MHZ. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2);   /* flexspi clock 120M. */

 

const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {

  [4 * NOR_CMD_LUT_SEQ_IDX_READID] =
   FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),
  [4 * NOR_CMD_LUT_SEQ_IDX_READID + 1] =
   FLEXSPI_LUT_SEQ(kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

}

 

In DDR, I configure flexspi as below and it doesn't work well ( ID reads as 0x04882E08)

flexspi_device_config_t deviceconfig = {
    .flexspiRootClk = 45000000,
    .flashSize = FLASH_SIZE,

     ...

}

CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24);   /* Set PLL3 PFD0 clock 360MHZ. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);   /* flexspi clock 90M. */

 

const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {

  [4 * NOR_CMD_LUT_SEQ_IDX_READID] =
   FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_DDR, kFLEXSPI_1PAD, 0x04),
  [4 * NOR_CMD_LUT_SEQ_IDX_READID + 1] =
   FLEXSPI_LUT_SEQ(kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

}

 

How can I fix it?

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