we're trying to do some PCIe compliance measurements for our customer on our custom CPU board.
The PCIe TX signals are connected to a differential probe with 50Ohm termination on our scope. When we power up the system we see what looks like the compliance pattern at 2.5Gbit/s.
I tried setting the PCI Express Link Control 2 Register (Link_Control_2_Register) at 0x036000A0 to 0x0012 in order to change the PCIe speed, but no change is visible on the scope.
Playing around with the other bits in the control register had no visible impact either.
I'm pretty sure I got the right PCIe controller; issuing a soft-reset using the PEX PFa Debug register (PEX_PF0_DBG) at 0x03680000 + 0x407FC turned off the pattern we saw. (And it turns out it is not possible to set the write enable and soft reset bits at the same time).
Also, when connecting a PCIe device we get the PCIe 2.0 5Gbit/s, so I'm sure our configuration supports the higher speed.
What am I missing? Is there another command I have to issue? Are there other registers I need to configure?
I'd appreciate any hints you could give me.