I am working on a custom board based on imx6qsabresd where I am using sgtl5000 audio codec as slave . I have configured SSI1 as i2s-master and getting approx. 24 Mhz clock on I2s_sclk pin of codec.
I want to divide this clock and for that I have to configure some registers according to IMX6DQRM manual.
Where should I configure these registers ? I have seen some files in old kernel but these are not present in our freescale 220.127.116.11 linux kernel.
Thanks & Regards,