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Clarification of operation of PDB DAC Triggers

Question asked by pgo on Oct 28, 2018
Latest reply on Nov 1, 2018 by xiangjun.rong

In the reference manual for K22F (MK22FN512VLH12,- K22P64M120SF5V2RM) the detailed description of the PDB DAC output triggers appears to be missing.

Referring to a similar K22F chip (MK22FN1M0AVLH12 -  K22P64M120SF5V2RM) there is a detailed description in section 37.4.3 including a diagram showing timing of DACINTx outputs (Figure 37-57).

 

The description and timing diagram along with the block diagram Figure 37-1 clearly indicates that the DACINT triggers are based on a separate counter.  There is quite a lot of Freescale documentation that describes the PDB DACINT triggers as a comparison value against the main PDB counter rather than as a separate counter.

The difference is quite significant.

Does this vary between Kinetis devices?

 

In any case, my main question relates to the DACINT counter when the PDB is operated in free-running mode after a software trigger.

Quoting from the K22P64M120SF5V2RM manual (since this is missing from the actual manual for the chip being used): 37.4.3 DAC interval trigger outputs

...

"DAC interval counters are also reset when the PDB counter reaches the MOD register value; therefore, when the PDB counter rolls over to zero, the DAC interval counters starts anew."

 

When experimenting with the the PDB triggering and a DAC it appears that the DACINT counter is NOT reset when the main PDB counter rolls over.  It is only reset when a trigger occurs.  This seems consistent with the Block diagram Figure 37-1.  This means that effectively in free-running mode the DACINT trigger is unrelated to the the main PDB counter after the initial trigger.   This limits the usefulness somewhat.

 

Tests done:

  • PDB set up to have a period of 10us, DACINT set to a period of 12us. I would expect no DAC conversions.  The DAC changes occur at a period of 12us after the software trigger.  The PDB period appears to have no effect.
  • PDB set up to have a period of 10us, DACINT set to a period of 6us. I would expect 1 DAC conversion every 10us with the first 6us after the trigger.  The DAC changes occur at a period of 6us after the software trigger. The PDB period appears to have no effect.

Using single-shot mode with a relatively slow PIT channel as a trigger gives the expected results confirming that the DACINT counter is reset when triggered.

  • 100 us PIT period, 10 us PDB period, 3 us DACINT value.  There is a group of three DAC changes at a 3us interval every 100 us.

 

I would appreciate confirmation or argument about my conclusion.

 

Thanks

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