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How to debug PRIMEing problem with HSUSB - K61

Question asked by Larry Harmon on Oct 25, 2018
Latest reply on Nov 5, 2018 by Hui_Ma

I'm trying to debug an issue with priming a high speed usb endpoint on a K61 processor.

I've been using a modified version of the Freescale USB stack (4.1) for over a year without issues.

Now I'm trying to add a new protocol (MSD) and have found that occasionally an OUT endpoint fails to prime.

The FW writes a 4 to the EPPRIME register and waits for the bit to clear, it never does.

The FW only uses 1 transfer descriptor per endpoint, so the Queue head is always empty when trying to add and prime another transfer descriptor.


We can detect when the problem occurs by counting NAK interrupts on the endpoint.

When we detect the problem the EPSR register does not show a receive buffer ready.

I've looked at the TX descriptor and Queue Head descriptors in memory, but can't see a problem.


Can anyone suggest how to debug this issue?