Kevin Huffman

IRQ & SPI Interrupt Priority Conflicts

Discussion created by Kevin Huffman on Dec 10, 2008
Latest reply on Dec 11, 2008 by kef
I have an application where I am interfacing an HC9S12 chip to an IR transciever through the SPI bus (via a MAX3100 chip).  The SPI bus communicates with the MAX3100.  The MAX3100 communicates with the IR module.  The SPI data transmissions to the Max3100 are interrupt driven (SPI transmit interrupt).  I also have the receive data full interrupt on the MAX3100 enabled and the output is wired to the HC9S12 IRQ interrupt.  When data is received on the IR port, the MAX3100 initiates an interrupt on the IRQ line.  In order to clear the IRQ interrupt source (the MAX3100), I must read the MAX3100 configuration register via the SPI bus.  It appears that I can't transmit data out of the SPI bus (also interrupt driven) with the IRQ interrupt active (SPI is lower priority than IRQ).
Is there a register where I can dynamically mask the IRQ interrupt long enough to send the SPI data?  Is my understanding of what I'm seeing correct?  Any help would be appreciated.