I have ported over the i.MX6UL FreeRTOS SDMA and sdma_memory_to_memory example application to the i.MX6SX platform for the Cortex-M4 core. When I run the application I get some strange behavior dependent upon the "count" parameter of the SDMA BD.
Platform: i.MX6SX SABRE-SDB
Toolchain: GNU Tools for Arm Embedded Processors 7-2018-q3-update
* All bytes in the source buffer are correctly copied to the destination buffer via the SDMA
* For counts 1-7, the source is correctly copied to the destination buffer.
* For count of 8 bytes, the first 4 bytes of the source are copied to the destination, then the next 4 bytes are copied to offset 12 (incorrectly skipping 8 bytes).
* For a count of 12 bytes, the behavior of 8 bytes is observed, but then the source bytes at offsets 8-11 are correctly located at destination offsets 8-11.
* For a count of 16 bytes, the behavior of 12 bytes is observed, but bytes at source offsets 8-15 are reproduced at destination offsets 16-23. This means bytes at offsets 8-11 are duplicated.
Steps to Reproduce:
1. Download the attached memory_to_memory.zip example
2. Create the directory FreeRTOS_BSP_1.0.1_iMX6SX/examples/imx6sx_sdb_m4/driver_examples/sdma
3. Extract the zip file to the location FreeRTOS_BSP_1.0.1_iMX6SX/examples/imx6sx_sdb_m4/driver_examples/sdma. A directory containing source should be created at FreeRTOS_BSP_1.0.1_iMX6SX/examples/imx6sx_sdb_m4/driver_examples/sdma/memory_to_memory.
4. Build with the script build_debug.sh in the FreeRTOS_BSP_1.0.1_iMX6SX/examples/imx6sx_sdb_m4/driver_examples/sdma/memory_to_memory/armgcc.
5. Load and run the resulting binary within u-boot.
* All memory is within the TCM so as to eliminate external memory configuration concerns.
Is there some misconfiguration within my program that would cause the SDMA M2M (IMX6SXRM Appendix A ap_2_ap) script to perform this behavior?
2018-10-30: The requested file has been uploaded.