Basic ECC SDRAM double-word consists of 8 data bytes and 1 ECC byte. For a normal ECC SDRAM operation each double-word ECC byte value must correspond to its data bytes vlaues. This correspondence can not be established when code is executed from SDRAM (in this case DDR controller will detect ECC errors) - this is why the ECC SDRAM is explicitly initialized in hardware (by means of the DDR controller) even before the U-Boot code is relocated to SDRAM.
1) Does this mean one cannot write to the ECC registers using devmem for example because there is one extra ECC byte that cannot be written to even though the four ECC lines are connected on the LS1043AQDS?
2) How can a driver, like the x86 EDAC driver read/write to the 1 ECC byte in kernel mode to control scrubbing operations if it can only be written before the U-boot code is relocated to SDRAM?