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Setting S12ZVLA128 VDD Level

Question asked by Jeremy Swanson on Oct 19, 2018

VDD on this uC is defaulted to 3.3V.  To switch it to 5V there is a bit in the CPMUVREGCTL register.  Processor Expert provides the ability to set all other editable bits in this register through it's standard interface, but not that one.

 

I ended up putting the following in my main() routine:

 

// Change VREG from 3.3V (default) to 5V 

setReg8Bits(CPMUVREGCTL, 0x80);

 

This works perfectly when I am debugging, but as soon as I power cycle the module everything else works but VDD is still at 3.3V.

 

  1. Is there some way I am missing to do this properly through Processor Expert or is this just something that fell through the cracks on NXP's part?
  2. Why does this work while debugging, but not when running independently?

 

Thanks in advance.

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