I am using S32K148 mcu to emulate uart with flexio. The configuration of register is shown as follows:
PCC->PCCn[77] |= 0x40000000u; /* Enable clock for PORTE */
PORTE->PCR[4] |= PORT_PCR_MUX(6); /*Set PE4 to flexIO D6 mode, tx */
PORTE->PCR[5] |= PORT_PCR_MUX(6); /*Set PE5 to flexIO D7 mode, rx */
PCC->PCCn[PCC_FlexIO_INDEX] &= ~PCC_PCCn_CGC_MASK; /* Ensure clk disabled for config */
PCC->PCCn[PCC_FlexIO_INDEX] &= ~PCC_PCCn_PCS_MASK; /* clear clk source selection */
PCC->PCCn[PCC_FlexIO_INDEX] |= PCC_PCCn_PCS(1); /* Clock Src= 1 (SOSCDIV2_CLK) */
PCC->PCCn[PCC_FlexIO_INDEX] |= PCC_PCCn_CGC_MASK; /* Enable clock */
/* Shifter Configuration*/
FLEXIO->SHIFTCFG[0] |= FLEXIO_SHIFTCFG_SSTOP(0x03) /* Stop bit enable on logic 1*/
| FLEXIO_SHIFTCFG_SSTART(0x02); /* Start bit 0 before loading the data on first shift*/
FLEXIO->SHIFTCTL[0] |= FLEXIO_SHIFTCTL_TIMSEL(0X00) /* Select Timer 0*/
| FLEXIO_SHIFTCTL_TIMPOL(0x00) /* Shift on pos edge*/
| FLEXIO_SHIFTCTL_PINCFG(0x03) /* Shift as output*/
| FLEXIO_SHIFTCTL_PINSEL(0x06) /* FXIO D6 as Tx*/
| FLEXIO_SHIFTCTL_PINPOL(0x00) /* Pin active high*/
| FLEXIO_SHIFTCTL_SMOD(0x02); /* Shifter in Tx mode*/
/* Timer Configuration*/
FLEXIO->TIMCFG[0] |= FLEXIO_TIMCFG_TIMDEC(0x00) /* Counter Decrement of FlexIO clock*/
| FLEXIO_TIMCFG_TIMDIS(0x02) /* Timer disable on Timer compare */
| FLEXIO_TIMCFG_TIMENA(0x02) /* Timer enable on trigger high */
| FLEXIO_TIMCFG_TSTOP(0x02) /* Stop bit is enabled on timer disable */
| FLEXIO_TIMCFG_TSTART(0x01); /* Enable start bit*/
FLEXIO->TIMCTL[0] |= FLEXIO_TIMCTL_TRGSEL(0x01) /* Trigger on shifter 0 status flag*/
| FLEXIO_TIMCTL_TRGPOL(0x00) /* Trigger active high*/
| FLEXIO_TIMCTL_TRGSRC(0x01) /* Internal Trigger*/
| FLEXIO_TIMCTL_TIMOD(0x01); /* Baud rate mode*/
/* Time Compare*/
*/
FLEXIO->TIMCMP[0] |= FLEXIO_TIMCMP_CMP(0x0F44); /* Baud rate at 115200*/
FLEXIO->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
The result is that PTE4 is always high. Is someone can help this?
