Why does writing to ECC_ERR_INJECT[EMB,EIEN]=0b'11 cause a hard reset on LS1043AQDS?

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Why does writing to ECC_ERR_INJECT[EMB,EIEN]=0b'11 cause a hard reset on LS1043AQDS?

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tracysmith
Contributor IV

Attempting to select mirror byte function for error injection.  ECC_ERR_INJECT[EMB, EIEN]= 0b'11

The default is 0b'00.

Does writing to ECC_ERR_INJECT[EMB,EIEN]=0b'11 cause a reset on the LS1043AQDS that supports ECC?

Can NXP test this on the ls1043AQDS and see if it resets the board?

 

# devmem 0x1080E08 w 0x00030000

 [ 839.465065] Unhandled fault: synchronous external abort (0x96000210) at 0xff

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ufedor
NXP Employee
NXP Employee

Setting the error inject bits EMB and EIEN solely does not initiate the reset, but it has to be considered that all subsequent memory data writes will have incorrect (mirrored) ECC byte, which will lead to mutli-bit error when this cache line will be read back.

To make clear experiment the bits have to be set either by means of a debugger or in the assembler code.

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tracysmith
Contributor IV

# devmem 0x1080E08 w 0x00030000

 [ 839.465065] Unhandled fault: synchronous external abort (0x96000210) at 0xff

1) So, ufedor you did run the above devmem command on the ls1043AQDS and you did not see a reset? 

2) But you did see multi-bit errors when you read it back and how did you determine you had multi-bit errors? 

My goal is to inject an ECC error after reading 32-bit data from memory using devmem doing the following steps. 

3) Why do I need to do this in a debugger or assembly instead of using devmem if you don't see a reset?  Will the 32-bit data read from memory below cause a multi-bit error?   If so, that is what I want if it is injecting the ECC error, correct?

Please refer to the following procedure to trigger ECC errors.

1a. Configure DDR_SDRAM_CFG_2[D_INIT]=0b'1 in Target Initialization File.
1b. Configure DDR_SDRAM_CFG[ECC_EN]=0b'1 in Target Initialization File.
2. Set SBE threshold to 1 in the code. ERR_SBE[SBET]= 0b'1
3. Enable error detection in the code. ERR_DISABLE[MBED,SBED]= 0b'00
4. Select mirror byte function. Inject error. ERR_INJECT[EMB, EIEN]= 0b'11
5. Write one 32-bit data 0x55aa_0000 into memory location 0x5000
6. Disable error injection : ERR_INJECT[EMB, EIEN]= 0b'00.
7. Read a 32-bit data from memory location 0x5000 to trigger ECC error.

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ufedor
NXP Employee
NXP Employee

Please understand that error injection in your case will be effective for the whole Linux OS, which will lead to immediate crash because other process(es) are writing data to SDRAM and reading it back in parallel with devmem.

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tracysmith
Contributor IV

I > Setting the error inject bits EMB and EIEN solely does not initiate the reset,

But you suggested above when you tried setting both EMB and EIEN on the ls1043AQDS, it did not reset, is this correct?  Yes or no?

If you set one or the other alone, it will not reset. But if you set both at the same time, it does or does not reset? Yes or no?

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