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How to tristate an output pin on KL03

Question asked by yz0 on Oct 9, 2018
Latest reply on Oct 9, 2018 by Mark Butcher

I am a bit confused by the manual when it is describing the GPIO behavior with regard to input/output buffers. 

I am reading from the KL03 Sub-Family Reference Manual Chapter 12 (PORT Control and Interrupts). Section 12.7.1 has the following sentence: "A pin can be floating due to an input pin that is not connected or an output pin that has tristated (output buffer is disabled)".

 

The problem with the statement above is that KL03 does not appear to have a register in the PORT module that would enable or disable an output buffer. Would someone help me understand what was meant by the statement above and how can I set the output pin to Z / High Impedance / Tristate?

 

Here is how I set everything up right now:

 

//Enable PORTB clock

SIM->SCGC5 |= SIM_SCGC5_PORTB(1);

 

//Initialize PB0 as GPIO

PORTB->PCR[0] = (PORTB->PCR[0] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(1);

 

//Set PB0 as output direction

GPIOB->PDDR |= (1U << 0U);

 

//Set PB0 to level HIGH

GPIOB->PDOR |= (1U << 0U);

 

//Need help setting PB0 to high impedance state

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