[MPC5748G] FCCU IO PH13/PH15

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[MPC5748G] FCCU IO PH13/PH15

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travis_kuo
Contributor III

HI ,

We use MPC5738G IO PH13 and PH15 as FCCU IO.

MPC5748G PH15 (symbol MCU1_FCCU_F0) with external pull down.

MPC5748G PH13 (symbol MCU1_FCCU_F1) with external pull high.

The problem is :

When MPC5748G executes functional reset with register programming on MC_ME_MCTL, there's small period of time that pin status of PH13 and PH15 of MPC5748G resets to default. This is treated as an error of bi-stable protocol. But there's no real error happen in MCU side.

Could you please check if there's any problem with this design? Any possible solution?

Thanks

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

the behavior you are describing is correct.

The problem is that MPC5738G use multiplexer on FCCU EOUT pins. Therefore after reset there is GPIO reset state on EOUT pins which is read by SBC as error state.

Actually according to our designers this is correct as SBC chip should be configured to read bi-stable protocol from these pins after the pins are configured. Until SBC is not configured to monitor EOUT pins the reset is not occurring.

So first configure EOUT pins and then enable in SBC bi-stable protocol monitoring.

2. You can always use pull resistors to force bi-stable normal state on EOUT. If the application is not safety oriented you can do this also.

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EOUT0 -> pull up

EOUT1 ->pull down

regards,

Peter

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