Discussion created by MrBean on Dec 4, 2008
Latest reply on Dec 5, 2008 by Chris Johns
The MCF522xx cores should load the SSP with the contents of location 0x0000_0000  on reset, so called SP_INIT in the vectortable (next is PC_INIT).
Why do i see random contents in A7 as well as OTHER_A7 in the register view of the dedugger ?
( directly after a reset, so PC=PC_INIT,  as well as in the next few instructions )   
( contents of other registers do diplay correctly )
Is that a feature of the debug mode or is the SSP accutally *not* loaded ?
How come ?


(PS: current cpu = MCF52235 )

Message Edited by MrBean on 2008-12-04 07:34 PM