The propagation delay for the LPC15xx comparator is specified in the datasheet only for the higher power setting. What are the propagation delays for the lower power settings?
I am using a pair of comparators and a timer to derive the power factor by measuring the current phase and comparing it to the voltage phase. The voltage signal comes from a small mains transformer (suitably attenuated) and the current from a current transformer.
I find the output of the comparator to be jittery on slow moving signals such as 50Hz mains. I cleaned up the voltage signal with SCT2, which triggered SCT0 as the phase comparator, but as I need two pairs of signals I don't have enough comparators.
Would using a low power setting to slow down the comparator reduce the jitter?
Or should I use the comparator filters?
If I divide the 16MHZ clock by 64, and reject anything less than 3 clock cycles, when exactly will the output of the comparator change state? Will it always be 12us after the last "bounce", or will it depend on where the transition occurs within the 250kHz divided clock cycle?