pinnmux in imx8m

[yashavanthashet]

Hi ,

Can anyone let me know what are below tuples used in "pins-imx8mq.h" file?

"<mux_reg conf_reg input_reg mux_mode input_val>"

I have understood that mux_reg  is offset of mux reg and conf_reg is offset of pad reg, and also mux_mode is alt-mode used.

But what are input_reg and input_val?

Also let me know how values to particular pins are given in dts?

for example in below pins how 82 is decided?

MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK    0x82

Thanks and Regards,

Yashavantha

[igorpadykov · Accepted solution]

Hi Yashavantha

these are input daisy register, for example

#define MX8MQ_IOMUXC_GPIO1_IO11_CCMSRCGPCMIX_PMIC_READY    0x054 0x2BC 0x4BC 0x5 0x1

nput_reg = 0x4BC - INPUT DAISY Register
input_val  = 0x1

sect.8.2.4.299 CCM_PMIC_READY_SELECT_INPUT DAISY Register
(IOMUXC_CCM_PMIC_READY_SELECT_INPUT) i.MX8MDQ Reference Manual
https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf

>for example in below pins how 82 is decided?

>MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK    0x82

this is setting for IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK described in

sect.8.2.4.275 SW_PAD_CTL_PAD_ECSPI1_SCLK SW PAD Control
Register (IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK) i.MX8MDQ Reference Manual 

Best regards
igor
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