TSC_TSTOP = 1; TSC_TRST = 1; TSC_PS = 6; TMODH = 0; TMODL = 0x7D; TCH1H = 0x00; TCH1L = 0x00; TSC1_MS1A = 1; TSC1_TOV1 = 1; TSC1_ELS1B = 1; TSC1_ELS1A = 0; TSC_TRST = 0; TSC_TSTOP = 0; TSC_TOIE = 1;
Clearing the toggle-on-overflow bit, TOVx, inhibits output toggles on TIM overflows. Subsequent output compares try to force the output to a state it is already in and have no effect. The result is a 0% duty cycle output.
I see some marginal notes in my manual imply that the "OC" time behaves differently for PWM. Also there is a query about the following phrase:
The value in the TIM channel registers determines the pulse width of the PWM output. The pulse width of an 8-bit PWM signal is variable in 256 increments. Writing $0080 (128) to the TIM channel registers produces a duty cycle of 128/256 or 50%.
(specifically, the suggestion that it should be $007f.)
Jim